MC912DG128A Motorola, MC912DG128A Datasheet - Page 87

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MC912DG128A

Manufacturer Part Number
MC912DG128A
Description
Microcontrollers
Manufacturer
Motorola
Datasheet

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DDRE — Port E Data Direction Register
PEAR — Port E Assignment Register
5-bus
MOTOROLA
RESET:
RESET:
RESET:
RESET:
RESET:
RESET:
DDE7
NDBE
BIT 7
Bit 7
0
0
0
1
1
0
CGMTE
DDE6
6
0
6
0
0
1
0
0
This register is not in the map in peripheral mode or expanded modes
when the EME bit is set.
Read and write anytime.
This register determines the primary direction for each port E pin
configured as general-purpose I/O.
PE[1:0] are associated with XIRQ and IRQ and cannot be configured
as outputs. These pins can be read regardless of whether the
alternate interrupt functions are enabled.
This register is not in the map in peripheral mode and expanded
modes while the EME control bit is set.
Read and write anytime.
Port E serves as general purpose I/O lines or as system and bus
control signals. The PEAR register is used to choose between the
general-purpose I/O functions and the alternate bus control functions.
When an alternate control function is selected, the associated DDRE
bits are overridden.
0 = Associated pin is a high-impedance input
1 = Associated pin is an output
PIPOE
DDE5
5
0
5
0
1
0
0
1
Bus Control and Input/Output
NECLK
DDE4
4
0
4
0
0
1
1
0
LSTRE
DDE3
3
0
3
0
1
0
0
1
RDWE
DDE2
2
0
2
0
1
0
0
1
CALE
MC68HC912DT128A Rev 2.0
Bus Control and Input/Output
1
0
0
0
0
0
1
0
0
DBENE
BIT 0
Bit 0
0
0
0
0
0
0
0
Normal sin-
Special sin-
Normal Ex-
Special Ex-
Peripheral
Registers
gle chip
gle chip
panded
panded
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$000A
87

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