MC912DG128A Motorola, MC912DG128A Datasheet - Page 286

• Manufacturer Part Number: MC912DG128A
• Description: Microcontrollers
• Manufacturer: Motorola

Clock System
MSCAN Controller
MC68HC912DT128A Rev 2.0
286
The previously described timer signal can be routed into the on-chip
timer module (ECT). Under the control of the timer link enable (TLNKEN)
bit in the CMCR0, this signal will be connected to the ECT timer channel
m input
After ECT timer has been programmed to capture rising edge events, it
can be used under software control to generate 16-bit time stamps which
can be stored with the received message.
Figure 47
circuitry. With this flexible clocking scheme the msCAN12 is able to
handle CAN bus rates ranging from 10 kbps up to 1 Mbps.
The clock source bit (CLKSRC) in the msCAN12 module control register
(CMCR1) (see
whether the msCAN12 is connected to the output of the crystal oscillator
(EXTALi) or to the system clock (SYSCLK).
The clock source has to be chosen such that the tight oscillator tolerance
requirements (up to 0.4%) of the CAN protocol are met. Additionally, for
high CAN bus rates (1 Mbps), a 50% duty cycle of the clock is required.
1. The timer channel being used for the timer link for CAN0 is channel 4 and for CAN1 is channel
5.
1
.
shows the structure of the msCAN12 clock generation
SYSCLK
EXTALi
msCAN12 Bus Timing Register 0
MSCAN Controller
CLKSRC
Figure 47 Clocking Scheme
CGM
CGMCANCLK
msCAN12
Prescaler
(1...64)
CLKSRC
(CBTR0)) defines
Time quanta
clock
MOTOROLA
18-mscan12