MC912DG128A Motorola, MC912DG128A Datasheet - Page 107
MC912DG128A
Manufacturer Part Number
MC912DG128A
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
1.MC912DG128A.pdf
(404 pages)
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7-eeprom
MOTOROLA
NOTE:
NOTE:
Bit 6 from high byte of SHADOW word should not be programmed in
order to have the full EEPROM array visible.
EESWAI — EEPROM Stops in Wait Mode
The EESWAI bit should be cleared if the WAIT mode vectors are
mapped in the EEPROM array.
PROTLCK — Block Protect Write Lock
DMY— Dummy bit
When NOSHW cleared, the regular EEPROM array bytes at address
$0FC0 and $0FC1 are not visible. The SHADOW word is accessed
instead for both read and program/erase operations. Bits[7:4] from
the high byte of the SHADOW word, $0FC0, are loaded to
EEMCR[7:4]. Bits[1:0] from the high byte of the SHADOW word,
$0FC0,are loaded to EEDIVH[1:0]. Bits[7:0] from the low byte of the
SHADOW word, $0FC1,are loaded to EEDIVL[7:0]. BULK
program/erase only applies if SHADOW word is enabled.
Read and write anytime.
Read anytime. Write once in normal modes (SMODN = 1), set and
clear any time in special modes (SMODN = 0).
Read and write anytime.
0 = The module is not affected during WAIT mode
1 = The module ceases to be clocked during WAIT mode
0 = Block protect bits and bulk erase protection bit can be written
1 = Block protect bits are locked
EEPROM
MC68HC912DT128A Rev 2.0
EEPROM Control Registers
EEPROM
107
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