MC912DG128A Motorola, MC912DG128A Datasheet - Page 183

• Manufacturer Part Number: MC912DG128A
• Description: Microcontrollers
• Manufacturer: Motorola

PWCTL — PWM Control Register
13-pwm
MOTOROLA
RESET:
Bit 7
0
0
6
0
0
Read and write anytime.
PSWAI — PWM Halts while in Wait Mode
CENTR — Center-Aligned Output Mode
RDPP — Reduced Drive of Port P
PUPP — Pull-Up Port P Enable
PSBCK — PWM Stops while in Background Mode
To avoid irregularities in the PWM output mode, write the CENTR bit
only when PWM channels are disabled.
0 = Allows PWM main clock generator to continue while in wait
1 = Halt PWM main clock generator when the part is in wait mode.
0 = PWM channels operate in left-aligned output mode
1 = PWM channels operate in center-aligned output mode
0 = All port P output pins have normal drive capability.
1 = All port P output pins have reduced drive capability.
0 = All port P pins have an active pull-up device disabled.
1 = All port P pins have an active pull-up device enabled.
0 = Allows PWM to continue while in background mode.
1 = Disable PWM input clock when the part is in background mode.
5
0
0
mode.
Pulse-Width Modulator
PSWAI
4
0
CENTR
3
0
RDPP
2
0
PUPP
MC68HC912DT128A Rev 2.0
1
0
PWM Register Descriptions
Pulse-Width Modulator
PSBCK
Bit 0
0
$0054
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