MC912DG128A Motorola, MC912DG128A Datasheet - Page 348
MC912DG128A
Manufacturer Part Number
MC912DG128A
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
1.MC912DG128A.pdf
(404 pages)
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Development Support
MC68HC912DT128A Rev 2.0
348
BK1RWE
–
–
–
0
1
1
BK1RW
X
–
–
–
0
1
BK1RWE — R/W Compare Enable
BK1RW — R/W Compare Value
BK0RWE — R/W Compare Enable
BK0RW — R/W Compare Value
Table 63 Breakpoint Read/Write Control
Enables the comparison of the R/W signal to further specify what
causes a match. This bit is NOT useful in program breakpoints or in
full breakpoint mode. This bit is used in conjunction with a second
address in dual address mode when BKDBE=1.
When BK1RWE = 1, this bit determines the type of bus cycle to
match.
Enables the comparison of the R/W signal to further specify what
causes a match. This bit is not useful in program breakpoints.
When BK0RWE = 1, this bit determines the type of bus cycle to match
on.
BK0RWE
0 = R/W is not used in comparisons
1 = R/W is used in comparisons
0 = A write cycle will be matched
1 = A read cycle will be matched
0 = R/W is not used in the comparisons
1 = R/W is used in comparisons
0 = Write cycle will be matched
1 = Read cycle will be matched
0
1
1
–
–
–
Development Support
BK0RW
X
0
1
–
–
–
R/W is don’t care for full mode or dual mode
BKP0
R/W is write for full mode or dual mode BKP0
R/W is read for full mode or dual mode BKP0
R/W is don’t care for dual mode BKP1
R/W is write for dual mode BKP1
R/W is read for dual mode BKP1
Read/Write Selected
MOTOROLA
22-dev
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