MC912DG128A Motorola, MC912DG128A Datasheet - Page 304

• Manufacturer Part Number: MC912DG128A
• Description: Microcontrollers
• Manufacturer: Motorola

msCAN12 Transmitter Control Register (CTCR)
MSCAN Controller
MC68HC912DT128A Rev 2.0
304
CTCR
$0107
RESET
W
R
NOTE:
Bit 7
0
0
TXE2 – TXE0 —Transmitter Buffer Empty
The CTFLG register is held in the reset state if the SFTRES bit in
CMCR0 is set.
ABTRQ2 – ABTRQ0 — Abort Request
ABTRQ2
This flag indicates that the associated transmit message buffer is
empty, thus not scheduled for transmission. The CPU must
handshake (clear) the flag after a message has been set up in the
transmit buffer and is due for transmission. The msCAN12 will set the
flag after the message has been sent successfully. The flag will also
be set by the msCAN12 when the transmission request was
successfully aborted due to a pending abort request
Transmitter Control Register
interrupt is pending while this flag is set.
Clearing this flag will also clear the corresponding Abort Acknowledge
flag (ABTAK, see above). Setting this flag will clear the corresponding
Abort Request flag (ABTRQ,
(CTCR)).
The CPU sets this bit to request that an already scheduled message
buffer (TXE = 0) shall be aborted. The msCAN12 will grant the
request when the message is not already under transmission. When
a message is aborted the associated TXE and the abort acknowledge
flag (ABTAK, see
be set and an TXE interrupt will occur if enabled. The CPU can not
reset ABTRQx. ABTRQx is reset implicitly whenever the associated
TXE flag is set.
6
0
0 = The associated message buffer is full (loaded with a message
1 = The associated message buffer is empty (not scheduled).
0 = No abort request.
1 = Abort request pending.
due for transmission).
ABTRQ1
5
0
MSCAN Controller
msCAN12 Transmitter Flag Register
ABTRQ0
4
0
msCAN12 Transmitter Control Register
(CTCR)). If not masked, a transmit
3
0
0
TXEIE2
2
0
TXEIE1
(msCAN12
1
0
(CTFLG)) will
MOTOROLA
36-mscan12
TXEIE0
Bit 0
0