MC912DG128A Motorola, MC912DG128A Datasheet - Page 197

• Manufacturer Part Number: MC912DG128A
• Description: Microcontrollers
• Manufacturer: Motorola

CFORC — Timer Compare Force Register
TIOS — Timer Input Capture/Output Compare Select
Timer Register Descriptions
11-ect
MOTOROLA
RESET:
RESET:
FOC7
IOS7
Bit 7
Bit 7
0
0
FOC6
IOS6
6
0
6
0
Input/output pins default to general-purpose I/O lines until an internal
function which uses that pin is specifically enabled. The timer overrides
the state of the DDR to force the I/O state of each associated port line
when an output compare using a port line is enabled. In these cases the
data direction bits will have no affect on these lines.
When a pin is assigned to output an on-chip peripheral function, writing
to this PORTT bit does not affect the pin but the data is stored in an
internal latch such that if the pin becomes available for general-purpose
output the driven level will be the last value written to the PORTT bit.
Read or write anytime.
IOS[7:0] — Input Capture or Output Compare Channel Configuration
Read anytime but will always return $00 (1 state is transient). Write
anytime.
0 = The corresponding channel acts as an input capture
1 = The corresponding channel acts as an output compare.
FOC5
IOS5
5
0
5
0
Enhanced Capture Timer
FOC4
IOS4
4
0
4
0
FOC3
IOS3
3
0
3
0
FOC2
IOS2
2
0
2
0
FOC1
IOS1
MC68HC912DT128A Rev 2.0
1
0
1
0
Timer Register Descriptions
Enhanced Capture Timer
FOC0
IOS0
Bit 0
Bit 0
0
0
$0081
$0080
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