MC912DG128A Motorola, MC912DG128A Datasheet - Page 75

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MC912DG128A

Manufacturer Part Number
MC912DG128A
Description
Microcontrollers
Manufacturer
Motorola
Datasheet

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PORTK — Port K Data Register
Page Index
register
descriptions
7-mapping
MOTOROLA
(PPAGE bit 2)
Emulation
Page Index 2
RESET:
PORT
0
0
1
1
ECS
Bit 7
PK7
-
(PPAGE bit 1)
Page Index 1
0
1
0
1
Table 13 Test mode program space Page Index
6
0
0
0
Read and write anytime
Writes do not change pin state when pin configured for page index
emulation output.
This port is associated with page index emulation pins. When the port is
not enabled to emulate page index, the port pins are used as
general-purpose I/O. Port K bit 3 is used as a general purpose I/O pin
only. This register is not in the map in peripheral or expanded modes
while the EMK control bit in MODE register is set.
When inputs, these pins can be selected to be high impedance or pulled
up.
ECS — Emulation Chip Select of selected program space
When this signal is active low it indicates that the program space is
accessed. This also applies to test mode program space. An access
is made if address is at the program space window and either the
Flash or external memory is accessed. The ECS timing is E clock high
(PPAGE bit 0)
Page Index 0
5
0
0
0
X
X
X
X
Resource Mapping
4
0
0
0
Flash EEPROM mapping through internal Memory Expansion
Flash register space Page
32K byte array Page 0
32K byte array Page 1
32K byte array Page 2
32K byte array Page 3
PK3
3
-
-
PIX2
PK2
2
-
PIX1
PK1
MC68HC912DT128A Rev 2.0
1
-
Flash array
00FEE32K
01FEE32K
10FEE32K
11FEE32K
PIX0
Resource Mapping
Bit 0
PK0
-
$00FC
75

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