MC912DG128A Motorola, MC912DG128A Datasheet - Page 347
MC912DG128A
Manufacturer Part Number
MC912DG128A
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
1.MC912DG128A.pdf
(404 pages)
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BRKCT1 — Breakpoint Control Register 1
21-dev
MOTOROLA
RESET:
Bit 7
0
0
BKDBE
6
0
This register is read/write in all modes.
BKDBE — Enable Data Bus
BKMBH — Breakpoint Mask High
BKMBL — Breakpoint Mask Low
BK1ALE BK0ALE
Enables comparing of address or data bus values using the BRKDH/
L registers.
Disables the comparing of the high byte of data when in full breakpoint
mode. Used in conjunction with the BKDBE bit (which should be set)
Disables the matching of the low byte of data when in full breakpoint
mode. Used in conjunction with the BKDBE bit (which should be set)
–
–
0
1
1 = BRKAL will be used to compare to the address bus.
0 = The BRKDH/L registers are not used in any comparison
1 = The BRKDH/L registers are used to compare address or data
0 = High byte of data bus (bits 15:8) are compared to BRKDH
1 = High byte is not used to in comparisons
0 = Low byte of data bus (bits 7:0) are compared to BRKDL
1 = Low byte is not used to in comparisons.
BKMBH
5
0
(depending upon the mode selections BKEN1,0)
Table 62 Breakpoint Address Range Control
0
1
–
–
Development Support
BKMBL
4
0
Upper 8-bit address only for full mode or dual mode BKP0
Full 16-bit address for full mode or dual mode BKP0
Upper 8-bit address only for dual mode BKP1
Full 16-bit address for dual mode BKP1
BK1RWE
3
0
Address Range Selected
BK1RW
2
0
BK0RWE
MC68HC912DT128A Rev 2.0
1
0
Development Support
BK0RW
Bit 0
0
Breakpoints
$0021
347
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