MC912DG128A Motorola, MC912DG128A Datasheet - Page 338

• Manufacturer Part Number: MC912DG128A
• Description: Microcontrollers
• Manufacturer: Motorola

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MC68HC912DT128A Rev 2.0
338
1. ENBDM is set to 1 by the firmware in Special Single Chip mode.
ENBDM — Enable BDM (permit active background debug mode)
BDMACT — Background Mode Active Status
The user should be careful that the state of the BDMACT bit is not
unintentionally changed with the WRITE_NEXT firmware command. If it
is unintentionally changed from 1 to 0, it will cause a system runaway
because it would disable the BDM firmware ROM while the CPU12 was
executing BDM firmware. The following two commands show how
BDMACT may unintentionally get changed from 1 to 0.
WRITE_X with data $FEFE
WRITE_NEXT with data $C400
The first command writes the data $FEFE to the X index register. The
second command writes the data $C4 to the $FF00 INSTRUCTION
register and also writes the data $00 to the $FF01 STATUS register.
ENTAG — Tagging Enable
BDMACT becomes set as active BDM mode is entered so that the
BDM firmware ROM is enabled and put into the map. BDMACT is
cleared by a carefully timed store instruction in the BDM firmware as
part of the exit sequence to return to user code and remove the BDM
memory from the map. This bit has 4 clock cycles write delay.
Set by the TAGGO command and cleared when BDM mode is
entered. The serial system is disabled and the tag function enabled
16 cycles after this bit is written.
0 = BDM cannot be made active (hardware commands still
1 = BDM can be made active to allow firmware commands.
0 = BDM is not active. BDM ROM and registers are not in map.
1 = BDM is active and waiting for serial commands. BDM ROM and
0 = Tagging not enabled, or BDM active.
1 = Tagging active. BDM cannot process serial commands while
allowed).
registers are in map
tagging is active.
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