MC912DG128A Motorola, MC912DG128A Datasheet - Page 175

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MC912DG128A

Manufacturer Part Number
MC912DG128A
Description
Microcontrollers
Manufacturer
Motorola
Datasheet

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PWCLK — PWM Clocks and Concatenate
PWM Register Descriptions
5-pwm
MOTOROLA
RESET:
CON23
Bit 7
0
CON01
6
0
Read and write anytime.
CON23 — Concatenate PWM Channels 2 and 3
CON01 — Concatenate PWM Channels 0 and 1
PCKA2 – PCKA0 — Prescaler for Clock A
PCKB2 – PCKB0 — Prescaler for Clock B
When concatenated, channel 2 becomes the high-order byte and
channel 3 becomes the low-order byte. Channel 2 output pin is used
as the output for this 16-bit PWM (bit 2 of port P). Channel 3
clock-select control bits determines the clock source. Channel 3
output pin becomes a general purpose I/O.
When concatenated, channel 0 becomes the high-order byte and
channel 1 becomes the low-order byte. Channel 0 output pin is used
as the output for this 16-bit PWM (bit 0 of port P). Channel 1
clock-select control bits determine the clock source. Channel 1 output
pin becomes a general purpose I/O.
Clock A is one of two clock sources which may be used for channels
0 and 1. These three bits determine the rate of clock A, as shown in
Table
Clock B is one of two clock sources which may be used for channels
2 and 3. These three bits determine the rate of clock B, as shown in
Table
0 = Channels 2 and 3 are separate 8-bit PWMs.
1 = Channels 2 and 3 are concatenated to create one 16-bit PWM
0 = Channels 0 and 1 are separate 8-bit PWMs.
1 = Channels 0 and 1 are concatenated to create one 16-bit PWM
PCKA2
5
0
28.
28.
channel.
channel.
Pulse-Width Modulator
PCKA1
4
0
PCKA0
3
0
PCKB2
2
0
PCKB1
MC68HC912DT128A Rev 2.0
1
0
PWM Register Descriptions
Pulse-Width Modulator
PCKB0
Bit 0
0
$0040
175

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