MC912DG128A Motorola, MC912DG128A Datasheet - Page 95

• Manufacturer Part Number: MC912DG128A
• Description: Microcontrollers
• Manufacturer: Motorola

FEELCK — Flash EEPROM Lock Control Register
FEEMCR — Flash EEPROM Module Configuration Register
Flash EEPROM Registers
3-flash
MOTOROLA
RESET:
RESET:
Bit 7
Bit 7
0
0
0
0
6
0
0
6
0
0
Each 32K byte Flash EEPROM module has a set of registers. The
register space $00F4-$00F7 is in a register space window of four pages.
Each register page of four bytes maps the register space for each Flash
module and each page is selected by the PPAGE register. See
Resource Mapping
LOCK — Lock Register Bit
BOOTP — Boot Protect
In normal modes the LOCK bit can only be written once after reset.
This register controls the operation of the Flash EEPROM array.
BOOTP cannot be changed when the LOCK control bit in the
FEELCK register is set or if ENPE in the FEECTL register is set.
The boot blocks are located at $E000–$FFFF and $A000–$BFFF for
odd program pages for each Flash EEPROM module. Since boot
programs must be available at all times, the only useful boot block is
at $E000–$FFFF location. All paged boot blocks can be used as
protected program space if desired.
0 = Enable write to FEEMCR register
1 = Disable write to FEEMCR register
0 = Enable erase and program of 8K byte boot block
1 = Disable erase and program of 8K byte boot block
5
0
0
5
0
0
Flash EEPROM
4
0
0
4
0
0
3
0
0
3
0
0
2
0
0
2
0
0
MC68HC912DT128A Rev 2.0
1
0
0
1
0
0
Flash EEPROM Registers
BOOTP
LOCK
Bit 0
Bit 0
0
1
Flash EEPROM
$00F4
$00F5
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