MC912DG128A Motorola, MC912DG128A Datasheet - Page 171
MC912DG128A
Manufacturer Part Number
MC912DG128A
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
1.MC912DG128A.pdf
(404 pages)
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1-pwm
MOTOROLA
Contents
Introduction
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171
PWM Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175
PWM Boundary Cases . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 186
The pulse-width modulator (PWM) subsystem provides four
independent 8-bit PWM waveforms or two 16-bit PWM waveforms or a
combination of one 16-bit and two 8-bit PWM waveforms. Each
waveform channel has a programmable period and a programmable
duty-cycle as well as a dedicated counter. A flexible clock select scheme
allows four different clock sources to be used with the counters. Each of
the modulators can create independent, continuous waveforms with
software-selectable duty rates from 0 percent to 100 percent. The PWM
outputs can be programmed as left-aligned outputs or center-aligned
outputs.
The period and duty registers are double buffered so that if they change
while the channel is enabled, the change will not take effect until the
counter rolls over or the channel is disabled. If the channel is not
enabled, then writes to the period and/or duty register will go directly to
the latches as well as the buffer, thus ensuring that the PWM output will
always be either the old waveform or the new waveform, not some
variation in between.
A change in duty or period can be forced into immediate effect by writing
the new value to the duty and/or period registers and then writing to the
counter. This causes the counter to reset and the new duty and/or period
values to be latched. In addition, since the counter is readable it is
Pulse-Width Modulator
Pulse-Width Modulator
Pulse-Width Modulator
MC68HC912DT128A Rev 2.0
171
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