MC912DG128A Motorola, MC912DG128A Datasheet - Page 200

• Manufacturer Part Number: MC912DG128A
• Description: Microcontrollers
• Manufacturer: Motorola

Enhanced Capture Timer
MC68HC912DT128A Rev 2.0
200
TSWAI — Timer Module Stops While in Wait
TSBCK — Timer and Modulus Counter Stop While in Background Mode
TFFCA — Timer Fast Flag Clear All
TSWAI also affects pulse accumulators and modulus down counters.
TBSCK does not stop the pulse accumulator.
0 = Allows the timer module to continue running during wait.
1 = Disables the timer module when the MCU is in the wait mode.
0 = Allows the timer and modulus counter to continue running while
1 = Disables the timer and modulus counter whenever the MCU is
0 = Allows the timer flag clearing to function normally.
1 = For TFLG1($8E), a read from an input capture or a write to the
Timer interrupts cannot be used to get the MCU out of wait.
in background mode.
in background mode. This is useful for emulation.
output compare channel ($90–$9F) causes the corresponding
channel flag, CnF, to be cleared. For TFLG2 ($8F), any access
to the TCNT register ($84, $85) clears the TOF flag. Any
access to the PACN3 and PACN2 registers ($A2, $A3) clears
the PAOVF and PAIF flags in the PAFLG register ($A1). Any
access to the PACN1 and PACN0 registers ($A4, $A5) clears
the PBOVF flag in the PBFLG register ($B1). Any access to the
MCCNT register ($B6, $B7) clears the MCZF flag in the
MCFLG register ($A7). This has the advantage of eliminating
software overhead in a separate clear sequence. Extra care is
required to avoid accidental flag clearing due to unintended
accesses.
Enhanced Capture Timer
MOTOROLA
14-ect