MC912DG128A Motorola, MC912DG128A Datasheet - Page 315

• Manufacturer Part Number: MC912DG128A
• Description: Microcontrollers
• Manufacturer: Motorola

5-atd
MOTOROLA
DSGN — Signed/Unsigned Result Data Mode
ASCIE — ATD Sequence Complete Interrupt Enable
Table 48 Left Justified, Signed and Unsigned ATD Output Codes.
SRES10
Vrh = 5.12 Volts
Note that signed data is not available for right justified data.
Therefore, sign extension hardware is not required.
Table 47
are set up using the control bits.
between the signed and unsigned, left justified output codes for an
input signal range between 0 and 5.1 Volts.
Vrl = 0 Volts
Input Signal
5.120 Volts
0
0
0
1
1
1
0 = Unsigned result register data
1 = Signed result register data
0 = Disables ATD interrupt
1 = Enables ATD interrupt on sequence complete
5.100
5.080
2.580
2.560
2.540
0.020
0.000
Analog-To-Digital Converter (ATD)
summarizes the result data formats available and how they
DJM
Table 47 Result Data Formats Available.
0
0
1
0
0
1
Signed
DSGN
Codes
8-Bit
7F
7F
7E
FF
01
00
81
80
X
X
0
1
0
1
Unsigned
Table 48
Description and Bus Bit Mapping
10-bit/left justified/unsign - bits 6-15
10-bit/left justified/signed - bits 6-15
10-bit/right justified/unsign - bits 0-9
8-bit/ left justified/signed - bits 8-15
Codes
8-bit/left justified/unsign - bits 8-15
8-bit/right justified/unsign - bits 0-7
8-Bit
FF
FF
FE
81
80
7F
01
00
Result Data Formats
Analog-To-Digital Converter (ATD)
illustrates the difference
MC68HC912DT128A Rev 2.0
Signed
Codes
10-Bit
7FC0
7F00
7E00
FF00
0100
0000
8100
8000
ATD Registers
Unsigned
Codes
10-Bit
FFC0
FF00
FE00
8100
8000
7F00
0100
0000
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