MC912DG128A Motorola, MC912DG128A Datasheet - Page 206

• Manufacturer Part Number: MC912DG128A
• Description: Microcontrollers
• Manufacturer: Motorola

PACTL — 16-Bit Pulse Accumulator A Control Register
TC4 — Timer Input Capture/Output Compare Register 4
TC5 — Timer Input Capture/Output Compare Register 5
TC6 — Timer Input Capture/Output Compare Register 6
TC7 — Timer Input Capture/Output Compare Register 7
Enhanced Capture Timer
MC68HC912DT128A Rev 2.0
206
RESET:
Bit 15
Bit 15
Bit 15
Bit 15
BIT 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
0
0
PAEN
14
14
14
14
6
6
6
6
6
6
6
6
6
0
Depending on the TIOS bit for the corresponding channel, these
registers are used to latch the value of the free-running counter when a
defined transition is sensed by the corresponding input capture edge
detector or to trigger an output action for output compare.
Read anytime. Write anytime for output compare function. Writes to
these registers have no meaning or effect during input capture. All timer
input capture/output compare registers are reset to $0000.
16-Bit Pulse Accumulator A (PACA) is formed by cascading the 8-bit
pulse accumulators PAC3 and PAC2.
When PAEN is set, the PACA is enabled. The PACA shares the input pin
with IC7.
Read: any time
Write: any time
PAMOD
13
13
13
13
5
5
5
5
5
5
5
5
5
0
Enhanced Capture Timer
PEDGE
12
12
12
12
4
4
4
4
4
4
4
0
4
4
CLK1
11
11
11
11
3
3
3
3
3
3
3
3
3
0
CLK0
10
10
10
10
2
2
2
2
2
2
2
2
2
0
PAOVI
1
9
1
1
9
1
1
9
1
1
9
1
1
0
BIT 0
Bit 0
Bit 8
Bit 0
Bit 0
Bit 8
Bit 0
Bit 0
Bit 8
Bit 0
Bit 0
Bit 8
Bit 0
PAI
0
$009A–$009B
$009C–$009D
$009E–$009F
$0098–$0099
MOTOROLA
$00A0
20-ect