MC912DG128A Motorola, MC912DG128A Datasheet - Page 392

• Manufacturer Part Number: MC912DG128A
• Description: Microcontrollers
• Manufacturer: Motorola

Glossary
COP — See "computer operating properly module (COP)."
CPU — See “central processor unit (CPU).”
CPU12 — The CPU of the MC68HC12 Family.
CPU clock — Bus clock select bits BCSP and BCSS in the clock select register (CLKSEL)
CPU cycles — A CPU cycle is one period of the internal bus clock, normally derived by dividing
CPU registers — Memory locations that are wired directly into the CPU logic instead of being
cycle time — The period of the operating frequency: t
D — See “accumulators (A and B or D).”
decimal number system — Base 10 numbering system that uses the digits zero through nine.
duty cycle — A ratio of the amount of time the signal is on versus the time it is off. Duty cycle is
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determine which clock drives SYSCLK for the main system, including the CPU and buses.
When EXTALi drives the SYSCLK, the CPU or bus clock frequency (f
EXTALi frequency divided by 2.
a crystal oscillator source by two or more so the high and low times will be equal. The
length of time required to execute an instruction is measured in CPU clock cycles.
part of the addressable memory map. The CPU always has direct access to the
information in these registers. The CPU registers in an M68HC12 are:
usually represented by a percentage.
•
•
•
•
•
•
•
A (8-bit accumulator)
B (8-bit accumulator)
–
IX (16-bit index register)
IY (16-bit index register)
SP (16-bit stack pointer)
PC (16-bit program counter)
CCR (8-bit condition code register)
D (16-bit accumulator formed by concatenation of accumulators A and B)
Glossary
CYC
= 1/f
OP
.
o
) is equal to the
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