MC912DG128A Motorola, MC912DG128A Datasheet - Page 245

• Manufacturer Part Number: MC912DG128A
• Description: Microcontrollers
• Manufacturer: Motorola

DDRS — Data Direction Register for Port S
Port S
PORTS — Port S Data Register
23-msi
MOTOROLA
RESET:
RESET:
MSI
DDS7
Bit 7
Bit 7
PS7
SS
CS
0
-
DDS6
SCK
PS6
6
0
6
-
some slave devices are very simple and either accept data from the
master without returning data to the master or pass data to the master
without requiring data from the master.
In all modes, port S bits PS[7:0] can be used for either general-purpose
I/O, or with the SCI and SPI subsystems. During reset, port S pins are
configured as high-impedance inputs (DDRS is cleared).
Read anytime (inputs return pin level; outputs return pin driver input
level). Write data stored in internal latch (drives pins only if configured
for output). Writes do not change pin state when pin configured for SPI
or SCI output.
After reset all bits are configured as general-purpose inputs.
Port S shares function with the on-chip serial systems (SPI and SCI0/1).
Read or write anytime.
After reset, all general-purpose I/O are configured for input only.
0 = Configure the corresponding I/O pin for input only
1 = Configure the corresponding I/O pin for output
MOMI
DDS5
MOSI
PS5
5
0
5
-
Multiple Serial Interface
DDS4
MISO
SISO
PS4
4
4
0
-
DDS3
TXD1
PS3
3
3
0
-
RXD1
DDS2
PS2
2
2
0
-
TXD0
DDS1
PS1
MC68HC912DT128A Rev 2.0
1
1
0
-
Multiple Serial Interface
RXD0
DDS0
Bit 0
PS0
Bit 0
-
0
$00D7
$00D6
Port S
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