MC912DG128A Motorola, MC912DG128A Datasheet - Page 118

• Manufacturer Part Number: MC912DG128A
• Description: Microcontrollers
• Manufacturer: Motorola

Resets and Interrupts
MC68HC912DT128A Rev 2.0
118
Vector Address
$FFDC, $FFDD
$FFCC, $FFCD
$FFEC, $FFED
$FFDE, $FFDF
$FFDA, $FFDB
$FFCE, $FFCF
$FFCA, $FFCB
$FFFC, $FFFD
$FFEE, $FFEF
$FFEA, $FFEB
$FFBE, $FFBF
$FFFE, $FFFF
$FFFA, $FFFB
$FFD8, $FFD9
$FFD6, $FFD7
$FFD4, $FFD5
$FFD2, $FFD3
$FFD0, $FFD1
$FFC8, $FFC9
$FFC6, $FFC7
$FFC4, $FFC5
$FFC2, $FFC3
$FFC0, $FFC1
$FFE8, $FFE9
$FFE6, $FFE7
$FFE4, $FFE5
$FFE2, $FFE3
$FFE0, $FFE1
$FFF8, $FFF9
$FFF6, $FFF7
$FFF4, $FFF5
$FFF2, $FFF3
$FFF0, $FFF1
Reset
Clock monitor fail reset
COP failure reset
Unimplemented instruction trap
SWI
XIRQ
IRQ
Real time interrupt
Timer channel 0
Timer channel 1
Timer channel 2
Timer channel 3
Timer channel 4
Timer channel 5
Timer channel 6
Timer channel 7
Timer overflow
Pulse accumulator overflow
Pulse accumulator input edge
SPI serial transfer complete
SCI 0
SCI 1
ATD0 or ATD1
MSCAN 0 wake-up
Key wake-up J or H
Modulus down counter underflow
Pulse Accumulator B Overflow
MSCAN 0 errors
MSCAN 0 receive
MSCAN 0 transmit
CGM lock and limp home
IIC Bus
MSCAN 1 wake-up
Interrupt Source
Table 21 Interrupt Vector Map
Resets and Interrupts
Mask
None
None
None
None
None
CCR
X bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
COPCTL (CME, FCME)
PLLCR (LOCKIE, LHIE)
(TIE, TCIE, RIE, ILIE)
(TIE, TCIE, RIE, ILIE)
C0TCR (TXEIE[2:0])
ATDxCTL2 (ASCIE)
C0RIER (RWRNIE,
RERRIE, TERRIE,
COP rate selected
C0RIER (WUPIE)
C1RIER (WUPIE)
BOFFIE, OVRIE)
C0RIER (RXFIE)
INTCR (IRQEN)
PBCTL (PBOVI)
PACTL (PAOVI)
SP0CR1 (SPIE)
KWIEJ[7:0] and
MCCTL (MCZI)
RTICTL (RTIE)
Local Enable
TMSK1 (C1I)
TMSK1 (C3I)
TMSK1 (C4I)
TMSK1 (C5I)
TMSK1 (C6I)
TMSK1 (C7I)
TMSK2 (TOI)
TMSK1 (C0I)
TMSK1 (C2I)
PACTL (PAI)
KWIEH[7:0]
IBCR (IBIE)
TWRNIE,
SC0CR2
SC1CR2
None
None
None
None
HPRIO Value to
Elevate
MOTOROLA
$EC
$DC
$CC
$CA
$EE
$EA
$DE
$DA
$D8
$D6
$D4
$D2
$D0
$CE
$C8
$C6
$C4
$C2
$C0
$BE
$F2
$F0
$E8
$E6
$E4
$E2
$E0
–
–
–
–
–
–
4-reset