MC912DG128A Motorola, MC912DG128A Datasheet - Page 72

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MC912DG128A

Manufacturer Part Number
MC912DG128A
Description
Microcontrollers
Manufacturer
Motorola
Datasheet

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EEPROM Mapping
INITEE— Initialization of Internal EEPROM Position Register
Flash EEPROM mapping through internal Memory Expansion
Resource Mapping
MC68HC912DT128A Rev 2.0
72
RESET:
EE15
Bit 7
0
EE14
6
0
RAM[15:13] — Internal RAM map position
The MC68HC912DT128A has 2K bytes of EEPROM which is activated
by the EEON bit in the INITEE register. Mapping of internal EEPROM is
controlled by four bits in the INITEE register. After reset EEPROM
address space begins at location $0800 but can be mapped to any 4K
byte boundary within the standard 64K byte address space. The
EEPROM block occupies the last 2K bytes of the 4K byte block.
EE[15:12] — Internal EEPROM map position
EEON — internal EEPROM On (Enabled)
The Page Index register or PPAGE provides memory management for
the MC68HC912DT128A. PPAGE consists of three bits to indicate
which physical location is active within the windows of the
MC68HC912DT128A. The MC68HC912DT128A has a user’s program
These bits specify the upper three bits of the 16-bit RAM address.
Normal modes: write once; special modes: write anytime. Read
anytime.
These bits specify the upper four bits of the 16-bit EEPROM address.
Normal modes: write once; special modes: write anytime. Read
anytime.
Read or write anytime.
0 = Removes the EEPROM from the map.
1 = Places the on-chip EEPROM in the memory map at the
EE13
5
0
address selected by EE[15:12].
Resource Mapping
EE12
4
0
3
0
0
2
0
0
1
0
0
EEON
Bit 0
1
MOTOROLA
4-mapping
$0012

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