MC912DG128A Motorola, MC912DG128A Datasheet - Page 170

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MC912DG128A

Manufacturer Part Number
MC912DG128A
Description
Microcontrollers
Manufacturer
Motorola
Datasheet

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COPRST — Arm/Reset COP Timer Register
Clock Functions
MC68HC912DT128A Rev 2.0
170
RESET:
Bit 7
Bit 7
0
6
6
0
Always reads $00.
Writing $55 to this address is the first step of the COP watchdog
sequence.
Writing $AA to this address is the second step of the COP watchdog
sequence. Other instructions may be executed between these writes
but both must be completed in the correct order prior to time-out to
avoid a watchdog reset. Writing anything other than $55 or $AA
causes a COP reset to occur.
5
5
0
Clock Functions
4
4
0
3
3
0
2
2
0
1
1
0
Bit 0
Bit 0
0
MOTOROLA
36-clock
$0017

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