MC912DG128A Motorola, MC912DG128A Datasheet - Page 265

• Manufacturer Part Number: MC912DG128A
• Description: Microcontrollers
• Manufacturer: Motorola

Generation of
STOP
19-iicbus
MOTOROLA
ISR
TRANSMIT
master receive mode is required, indicated by R/W bit in IBDR, then the
Tx/Rx bit should be toggled at this stage.
During slave mode address cycles (IAAS=1) the SRW bit in the status
register is read to determine the direction of the subsequent transfer and
the Tx/Rx bit is programmed accordingly. For slave mode data cycles
(IAAS=0) the SRW bit is not valid, the Tx/Rx bit in the control register
should be read to determine the direction of the current transfer.
The following is an example of a software response by a ’master
transmitter’ in the interrupt routine (see
A data transfer ends with a STOP signal generated by the ’master’
device. A master transmitter can simply generate a STOP signal after all
the data has been transmitted. The following is an example showing how
a stop condition is generated by a master transmitter.
If a master receiver wants to terminate a data transfer, it must inform the
slave transmitter by not acknowledging the last byte of data which can
be done by setting the transmit acknowledge bit (TXAK) before reading
the 2nd last byte of data. Before reading the last byte of data, a STOP
MASTX
END
EMASTX
BCLR
BRCLR
BRCLR
BRSET
MOVB
TST
BEQ
BRSET
MOVB
DEC
BRA
BCLR
RTI
IBSR,#$02
IBCR,#$20,SLAVE
IBCR,#$10,RECEIVE
IBSR,#$01,END
DATABUF,IBDR
Inter-IC Bus
TXCNT
END
IBSR,#$01,END
DATABUF,IBDR
TXCNT
EMASTX
IBCR,#$20
;CLEAR THE IBIF FLAG
;BRANCH IF IN SLAVE MODE
;BRANCH IF IN RECEIVE MODE
;IF NO ACK, END OF TRANSMISSION
;TRANSMIT NEXT BYTE OF DATA
;GET VALUE FROM THE
;TRANSMITING COUNTER
;END IF NO MORE DATA
;END IF NO ACK
;TRANSMIT NEXT BYTE OF DATA
;DECREASE THE TXCNT
;EXIT
;GENERATE A STOP CONDITION
;RETURN FROM INTERRUPT
Figure
40).
MC68HC912DT128A Rev 2.0
IIC Programming Examples
Inter-IC Bus
265