MC912DG128A Motorola, MC912DG128A Datasheet - Page 79

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MC912DG128A

Manufacturer Part Number
MC912DG128A
Description
Microcontrollers
Manufacturer
Motorola
Datasheet

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MTST0 — Mapping Test Register 0
MTST1 — Mapping Test Register 1
Mapping test registers
11-mapping
MOTOROLA
RESET:
RESET:
CAUTION:
MT07
MT0F
Bit 7
Bit 7
0
0
MT06
MT0E
6
0
6
0
Bit must be cleared before reading any of the arrays or registers.
ROMON — Enable Flash EEPROM
These registers are used in for testing the mapping logic. They can only
be read and after each read they get cleared. A write to each register will
have no effect.
In special mode and with ROMTST bit set, this bit will allow overlap of
the four 32K Flash arrays and overlap the four 4-byte Flash register
space in the same map space to be able to program all arrays at the
same time.
These bits are used to enable the Flash EEPROM arrays.
1 = Disables direct access to 16K byte Flash EEPROM from
0 = The four 32K Flash arrays are accessed with four pages for
1 = The four 32K Flash arrays coincide in the same space and are
0 = Disables Flash EEPROM in the memory map.
1 = Enables Flash EEPROM in the memory map.
MT0D
MT05
5
0
5
0
$4000-$7FFF in the memory map. The physical location of
this16K byte Flash can still be accessed through the Program
Page window.
each.
selected at the same time for programming.
Resource Mapping
MT0C
MT04
4
0
4
0
MT0B
MT03
3
0
3
0
MT0A
MT02
2
0
2
0
MT09
MT01
MC68HC912DT128A Rev 2.0
1
0
1
0
Mapping test registers
MT08
MT00
Resource Mapping
Bit 0
Bit 0
0
0
$00F8
$00F9
79

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