MC912DG128A Motorola, MC912DG128A Datasheet - Page 120

• Manufacturer Part Number: MC912DG128A
• Description: Microcontrollers
• Manufacturer: Motorola

HPRIO — Highest Priority I Interrupt
Interrupt test registers
Resets and Interrupts
MC68HC912DT128A Rev 2.0
120
RESET:
Bit 7
1
1
PSEL6
6
1
DLY — Enable Oscillator Start-up Delay on Exit from STOP
Write only if I mask in CCR = 1 (interrupts inhibited). Read anytime.
To give a maskable interrupt source highest priority, write the low byte
of the vector address to the HPRIO register. For example, writing $F0 to
HPRIO would assign highest maskable interrupt priority to the real-time
interrupt timer ($FFF0). If an un-implemented vector address or a
non-I-masked vector address (value higher than $F2) is written, then
IRQ will be the default highest priority interrupt.
These registers are used in special modes for testing the interrupt logic
and priority without needing to know which modules and what functions
are used to generate the interrupts.Each bit is used to force a specific
interrupt vector by writing it to 1.Bits are named with B6 through F4 to
indicate vectors $FFB6 through $FFF4. These bits are also used in
special modes to view that an interrupt caused by a module has reached
the interrupt module.
The delay time of about 4096 cycles is based on the XCLK rate
chosen.
DLY can be read anytime and written once in normal modes. In
special modes, DLY can be read and written anytime.
0 = No stabilization delay imposed on exit from STOP mode. A
1 = Stabilization delay is imposed before processing resumes after
PSEL5
5
1
stable external oscillator must be supplied.
STOP.
Resets and Interrupts
PSEL4
4
1
PSEL3
3
0
PSEL2
2
0
PSEL1
1
1
Bit 0
0
0
MOTOROLA
$001F
6-reset