MC912DG128A Motorola, MC912DG128A Datasheet - Page 194

• Manufacturer Part Number: MC912DG128A
• Description: Microcontrollers
• Manufacturer: Motorola

Enhanced Capture Timer Modes of Operation
IC Channels
Non-Buffered IC
Channels
Enhanced Capture Timer
MC68HC912DT128A Rev 2.0
194
The Enhanced Capture Timer has 8 Input Capture, Output Compare (IC/
OC) channels same as on the HC12 standard timer (timer channels TC0
to TC7). When channels are selected as input capture by selecting the
IOSx bit in TIOS register, they are called Input Capture (IC) channels.
Four IC channels are the same as on the standard timer with one
capture register which memorizes the timer value captured by an action
on the associated input pin.
Four other IC channels, in addition to the capture register, have also one
buffer called holding register. This permits to memorize two different
timer values without generation of any interrupt.
Four 8-bit pulse accumulators are associated with the four buffered IC
channels. Each pulse accumulator has a holding register to memorize
their value by an action on its external input. Each pair of pulse
accumulators can be used as a 16-bit pulse accumulator.
The 16-bit modulus down-counter can control the transfer of the IC
registers contents and the pulse accumulators to the respective holding
registers for a given period, every time the count reaches zero.
The modulus down-counter can also be used as a stand-alone time base
with periodic interrupt capability.
The IC channels are composed of four standard IC registers and four
buffered IC channels.
The main timer value is memorized in the IC register by a valid input pin
transition. If the corresponding NOVWx bit of the ICOVW register is
cleared, with a new occurrence of a capture, the contents of IC register
are overwritten by the new value.
An IC register is empty when it has been read or latched into the
holding register.
A holding register is empty when it has been read.
Enhanced Capture Timer
MOTOROLA
8-ect