MC912DG128A Motorola, MC912DG128A Datasheet - Page 24

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MC912DG128A

Manufacturer Part Number
MC912DG128A
Description
Microcontrollers
Manufacturer
Motorola
Datasheet

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Addressing Modes
Central Processing Unit
(auto pre-decrement)
MC68HC912DT128A Rev 2.0
24
(auto pre-increment)
(accumulator offset)
Addressing Mode
Indexed-Indirect
Indexed-Indirect
post-increment)
(D accumulator
(16-bit offset)
(16-bit offset)
(5-bit offset)
(9-bit offset)
decrement)
(auto post-
Immediate
Extended
Inherent
Relative
Indexed
Indexed
Indexed
Indexed
Indexed
Indexed
Indexed
Indexed
offset)
Direct
(auto
(no externally supplied
INST [oprx16,xysp]
INST oprx16,xysp
INST oprx3,+xys
INST oprx3,xys+
INST oprx5,xysp
INST oprx3,–xys
INST oprx3,xys–
INST oprx9,xysp
Source Format
Table 3 M68HC12 Addressing Mode Summary
INST abd,xysp
INST [D,xysp]
INST #opr16i
Addressing modes determine how the CPU accesses memory locations
to be operated upon. The CPU12 includes all of the addressing modes
of the M68HC11 CPU as well as several new forms of indexed
addressing.
INST opr16a
INST #opr8i
INST opr8a
INST rel16
operands)
INST rel8
INST
or
or
Table 3
Central Processing Unit
Abbreviation
[D,IDX]
is a summary of the available addressing modes.
[IDX2]
IDX1
IDX2
IMM
EXT
REL
INH
DIR
IDX
IDX
IDX
IDX
IDX
IDX
Operand is the lower 8-bits of an address in the
An 8-bit or 16-bit relative offset from the current
5-bit signed constant offset from x, y, sp, or pc
9-bit signed constant offset from x, y, sp, or pc
(lower 8-bits of offset in one extension byte)
Operand is included in instruction stream
Auto post-decrement x, y, or sp by 1 ~ 8
16-bit constant offset from x, y, sp, or pc
16-bit constant offset from x, y, sp, or pc
Auto post-increment x, y, or sp by 1 ~ 8
Auto pre-decrement x, y, or sp by 1 ~ 8
Indexed with 8-bit (A or B) or 16-bit (D)
Operands (if any) are in CPU registers
Auto pre-increment x, y, or sp by 1 ~ 8
accumulator offset from x, y, sp, or pc
(16-bit offset in two extension bytes)
(16-bit offset in two extension bytes)
8- or 16-bit size implied by context
x, y, sp, or pc plus the value in D
Pointer to operand is found at...
Pointer to operand is found at...
pc is supplied in the instruction
Operand is a 16-bit address
range $0000 – $00FF
Description
MOTOROLA
4-cpu12

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