MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 170

KIT EVALUATION FOR MPC555

MPC555CME

Manufacturer Part Number
MPC555CME
Description
KIT EVALUATION FOR MPC555
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheet

Specifications of MPC555CME

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC555
Data Bus Width
32 bit
Interface Type
RS-232
For Use With/related Products
MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
3.15.4.12 Implementation-Dependent Software Emulation Interrupt
MPC555
USER’S MANUAL
An implementation-dependent software emulation interrupt occurs in the following in-
stances:
In addition, the following registers are set:
Save/Restore Register 0 (SRR0)
Save/Restore Register 1 (SRR1)
NOTES:
Machine State Register (MSR)
1. In the current implementation bit 30 of the SRR1 is never cleared other then by loading zero value from
• When executing any non-implemented instruction. This includes all illegal and un-
• When executing a mtspr or mfspr that specifies on-core non-implemented reg-
• When executing a mtspr or mfspr that specifies off-core non-implemented reg-
• Program interrupt is generated if ((MSR
• Floating-point enabled exception type program interrupt is not generated by float-
/
implemented optional instructions and all floating-point instructions.
ister, regardless of SPR
ister and SPR
a result of move to FPSCR instruction, move to MSR instruction, or the execution
of the rfi instruction.
ing-point arithmetic instructions, instead if ((MSR
set, the floating-point assist interrupt is generated.
MSR RI.
MPC556
Register Name
0
= 0 or MSR
CENTRAL PROCESSING UNIT
10:15
Other
Other
0
Bits
ME
1:4
LE
.
IP
Rev. 15 October 2000
PR
= 0 (no program interrupt condition).
Set to the effective address of the instruction that caused the
interrupt
Set to 0
Set to 0
Loaded from bits 16:31 of MSR
No change
No change
Bit is copied from ILE
Set to 0
FE0
| MSR
Description
FE0
FE1
| MSR
) and FPSCR
1
FE1
) &FPSCR
FEX
MOTOROLA
) is set as
FEX
3-48
) is

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