MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 239

KIT EVALUATION FOR MPC555

MPC555CME

Manufacturer Part Number
MPC555CME
Description
KIT EVALUATION FOR MPC555
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheet

Specifications of MPC555CME

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC555
Data Bus Width
32 bit
Interface Type
RS-232
For Use With/related Products
MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
TB — Time Base (Reading)
TB — Time Base (Writing)
6.13.4.3 Time Base Reference Registers
TBREF0 — Time Base Reference Register 0
TBREF1 — Time Base Reference Register 1
6.13.4.4 Time Base Control and Status Register
MPC555
USER’S MANUAL
MSB
MSB
MSB
MSB
0
0
0
0
initialization. The contents of the register may be written by the mttbl or the mttbu in-
structions, see
Refer to
(TB) — OEA
Two reference registers (TBREF0 and TBREF1) are associated with the lower part of
the time base (TBL). Each is a 32-bit read/write register. Upon a match between the
contents of TBL and the reference register, a maskable interrupt is generated.
The TBSCR is 16-bit read/write register. It controls the TB, decrementer count enable,
and interrupt generation and is used for reporting the source of the interrupts. The reg-
ister can be read anytime. A status bit is cleared by writing a one to it. (Writing a zero
has no effect.) More than one bit can be cleared at a time.
/
MPC556
3.8 PowerPC VEA Register Set — Time Base
for more information on reading and writing the TBU and TBL registers.
3.9.4 Time Base Facility (TB) —
TBU
TBU
SYSTEM CONFIGURATION AND PROTECTION
Rev. 15 October 2000
RESET: UNCHANGED
RESET: UNCHANGED
TBREF0
TBREF1
RESET:
RESET:
31 32
31 32
OEA.
and
3.9.4 Time Base Facility
TBL
TBL
SPR 268, 269
SPR 284, 285
0x2F C204
0x2F C208
MOTOROLA
LSB
LSB
LSB
6-31
63
63
31
LSB
31

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