MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 189

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

4.3.9 Decompression
MPC555
USER’S MANUAL
code compression, and is a result of the statistical study.
binary decode tree for specific instructions.
In
four bits. The bounded form of the Huffman code tree is limited in size for implemen-
tation into hardware. The largest compressed instruction is 36 bits — four bits for the
bypass mode plus the normal uncompressed 32-bit instruction.
1.
COF = Change of Flow
Figure
• The instruction code is stored in the memory in the compressed form
• The decode vocabulary is stored in the burst buffer controller (BBC).
• The decompression is done on-line by the dedicated decompressor unit in the
• Decompression flow: (See
BYPS_node
/
BBC.
— RCPU provides a “bit aligned COF
— ICDU:
MPC556
• Converts COF address to “word aligned physical address” to access the
• Fetches the compressed instruction code data from the memory, decom-
• When instructions are running without a COF, the next instruction is pre-
memory
presses it and delivers “non-compressed instruction code” together with
the bit aligned “next instruction address” to the RCPU, that uses it for sub-
routine and exceptions handling.
fetched and decoded in the current cycle. This eliminates any delays from
code compression during regular sequential (non-COF) operation.
4-12, instruction “a” would require two bits. The bypass node would require
Figure 4-12 Bounded Huffman Code Tree
b
e
d
Rev. 15 October 2000
a
Figure
BURST BUFFER
c
h
4-11)
1
g
address” to the BBC.
f
An “a” instruction half
requires less bits
than an “h” instruction
half.
A bypass instruction
requires four bits.
Figure 4-12
= another bit
= Instruction location
illustrates the
MOTOROLA
4-13