MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 327

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

9.5.6.1 Bus Request
MPC555
USER’S MANUAL
ecute a new cycle, the master must re-arbitrate before a new cycle can be executed.
The MPC555 / MPC556, however, guarantees data coherency for access to a small
port size and for decomposed bursts. This means that the MPC555 / MPC556 will not
release the bus before the completion of the transactions that are considered atomic.
Figure 9-23
The potential bus master asserts BR to request bus mastership. BR should be negated
as soon as the bus is granted, the bus is not busy, and the new master can drive the
bus. If more requests are pending, the master can keep asserting its bus request as
long as needed. When configured for external central arbitration, the MPC555 /
MPC556 drives this signal when it requires bus mastership. When the internal on-chip
arbiter is used, this signal is an input to the internal arbiter and should be driven by the
external bus master.
/
2. Assert BB to become next master
1. Assert BR
3. Negate BR
1. Wait for BB to be negated.
1. Perform data transfer
1. Negate BB
MPC556
Acknowledge Bus Mastership
Release Bus Mastership
Operate as Bus Master
Requesting Device
Request the Bus
describes the basic protocol for bus arbitration.
Figure 9-23 Bus Arbitration Flowchart
EXTERNAL BUS INTERFACE
Rev. 15 October 2000
1. Negate BG (or keep asserted to park
1. Assert BG
bus master)
Terminate Arbitration
Grant Bus Arbitration
Arbiter
MOTOROLA
9-31