MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 955

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Hall effect decode (HALLD) D-20
HALLD D-20
HALT 14-20, 16-11
Halt
HALTA 14-21
HALTA and MODF Interrupt Enable (HMIE) 14-41
HALTA/MODF interrupt enable (HMIE) bit 14-20
Hang on T4 (HOT4) 17-13
HMIE 14-20
HOT4 17-13
HSQR 17-16
HSSR 17-17
I/O port operation 13-7
IBRK 21-55
I-bus
I-bus support
ICTRL 21-47
ID
IDE 16-6
Identifier (ID) 16-1
IDLE 14-48, 14-57, 16-31
Idle
IEEE 1149.1-1990 standard. See JTAG
IFLAG 16-33
Ignore first match 21-48
IIFM 21-48
ILIE 14-46, 14-57
illegal and reserved instructions, 3-38
ILSCI 14-8, 14-9
ILT 14-46, 14-57
IMASK 16-32
IMB 13-1, 13-24
implementation dependent software emulation interrupt,
implementation specific data TLB error interrupt, 3-50
implementation specific debug interrupt, 3-51
implementation specific instruction TLB error interrupt,
IMUL–IDIV 3-5
Information processing time (IPT) 16-9
MPC555 / MPC556
USER’S MANUAL
acknowledge flag (HALTA) 14-21
QSPI (HALT) 14-20
watchpoint programming 21-48
control register 21-47
Extended (IDE) field 16-6
HIGH field 16-6
LOW field 16-6
bit field 16-6
CAN status (IDLE) 16-31
frame 14-50
-line
detect type (ILT) 14-46
detected (IDLE) 14-48, 14-57
detection process 14-57
interrupt enable (ILIE) 14-46, 14-57
type (ILT) bit 14-57
3-48
3-49
–H–
–I–
Rev. 15 October 2000
INDEX
Initial sample time 13-12
Input
Instruction
Instruction fetch
instruction storage interrupt, 3-46
instructions
instructions, partially executed, 3-52
Integer exception register 3-17
Integer unit 3-5
Interchannel communication 17-4
Intermission 16-16
Intermodule bus (IMB) 13-1
Interrupt
Interrupt Level of SCI (ILSCI) 14-8, 14-9
Interrupts
interrupts, 3-44
Inter-transfer delay 14-14
invalid and preferred instructions, 3-39
Invalid channel number 13-47
IPT 16-9
IRQ 17-5
ISCTL 21-1
IST 13-28, 13-47
isync, 3-42
IU 3-5
IW 21-48
Joint test action group. See JTAG
JTAG 22-1
KR/RETRY, 9-5
LBRK 21-55
LBUF 16-27
L-bus support
LCK 20-3
LCTRL1 21-49
LCTRL2 21-50
sample time (IST) 13-28, 13-47
pipeline 3-36
sequencer 3-3
set summary 3-29
timing 3-36
show cycle control 21-1
cache control, 3-42
storage control, 3-44
sources 13-30
QADC 13-29
TOUCAN 16-19
TPU 17-5
instruction register 22-4
non-IEEE 1149.1-1990 operation 22-7
signals 22-1, 22-2
control register 1 21-49
control register 2 21-50
–K–
–L–
–J–
MOTOROLA
Index-5