MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 449

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

MPC555
USER’S MANUAL
Bit(s)
8:15
3:7
0
1
2
/
MPC556 QUEUED ANALOG-TO-DIGITAL CONVERTER MODULE-64
Name
SSE1
CIE1
PIE1
MQ1
—
Queue 1 completion interrupt enable. CIE1 enables completion interrupts for queue 1. The inter-
rupt request is generated when the conversion is complete for the last CCW in queue 1.
0 = Queue 1 completion interrupts disabled
1 = Generate an interrupt request after completing the last CCW in queue 1
Queue 1 pause interrupt enable. PIE1 enables pause interrupts for queue 1. The interrupt re-
quest is generated when the conversion is complete for a CCW that has the pause bit set.
0 = Queue 1 pause interrupts disabled
1 = Generate an interrupt request after completing a CCW in queue 1 which has the pause bit set
Queue 1 single-scan enable. SSE1 enables a single-scan of queue 1 after a trigger event occurs.
The SSE1 bit may be set to a one during the same write cycle that sets the MQ1 bits for the sin-
gle-scan queue operating mode. The single-scan enable bit can be written as a one or a zero,
but is always read as a zero.
The SSE1 bit allows a trigger event to initiate queue execution for any single-scan operation on
queue 1. The QADC64 clears SSE1 when the single-scan is complete.
Queue 1 operating mode. The MQ1 field selects the queue operating mode for queue 1.
13-13
Reserved
shows the different queue 1 operating modes.
Table 13-12 QACR1 Bit Descriptions
Rev. 15 October 2000
Description
MOTOROLA
Table
13-37