MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 617

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

IFLAG — Interrupt Flag Register
RXECTR — Receive Error Counter
TXECTR — Transmit Error Counter
16.7.14 Interrupt Flag Register
16.7.15 Error Counters
MPC555
USER’S MANUAL
MSB
MSB
Bit(s)
Bit(s)
0
0
0
0
8:15
8:15
0:7,
0:7,
RESET:
RESET:
1
0
1
0
/
MPC556
RXECTR,
TXECTR
IFLAGH,
IFLAGL
Name
Name
2
0
2
0
3
0
3
RXECTR
0
Table 16-26 RXECTR, TXECTR Bit Descriptions
IFLAGH
IFLAG contains two 8-bit fields, IFLAGH and IFLAGL. IFLAG can be accessed with a 16-bit
read or write, and IFLAGH and IFLAGL can be accessed with byte reads or writes.
IFLAG contains one interrupt flag bit per buffer. Each successful transmission/reception sets
the corresponding IFLAG bit and, if the corresponding IMASK bit is set, an interrupt request
will be generated.
To clear an interrupt flag, first read the flag as a one, and then write it as a zero. Should a
new flag setting event occur between the time that the CPU reads the flag as a one and
writes the flag as a zero, the flag is not cleared. This register can be written to zeros only.
NOTE: Bit 15 (LSB) corresponds to message buffer 0. Bit 0 (MSB) corresponds to mesage
buffer 15.
Both counters are read only, except when the TouCAN is in test or debug mode.
4
0
4
0
Table 16-25 IFLAG Bit Descriptions
CAN 2.0B CONTROLLER MODULE
5
0
5
0
Rev. 15 October 2000
6
0
6
0
7
0
7
0
8
0
8
0
Description
Description
9
0
9
0
10
10
0
0
11
11
0x30 70A6, 0x30 74A6
TXECTR
0
0
IFLAGL
12
12
0
0
13
13
0
0
0x30 70A4
0x30 74A4
MOTOROLA
14
14
0
0
16-35
LSB
LSB
15
15
0
0