MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 221

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

6.7 MPC555 / MPC556 Time Base (TB)
MPC555
USER’S MANUAL
The state of the DEC is not affected by any resets and should be initialized by soft-
ware. The DEC runs continuously after power-up once the time base is enabled by set-
ting the TBE bit of the TBSCR (see
programmed to turn off the clock). The decrementer continues counting while reset is
asserted.
Loading from the decrementer has no effect on the counter value. Storing to the dec-
rementer replaces the value in the decrementer with the value in the GPR.
Whenever bit zero (the MSB) of the decrementer changes from zero to one, a decre-
menter exception occurs. If software alters the decrementer such that the content of
bit 0 is changed to a value of 1, a decrementer exception occurs.
A decrementer exception causes a decrementer interrupt request to be pending in the
RCPU. When the decrementer exception is taken, the decrementer interrupt request
is automatically cleared.
Table 6-4
MHz or 20-MHz crystal, and TBS = 0 which selects tbclk division to FOUR.
Refer to
The time base (TB) is a 64-bit free-running binary counter defined by the MPC555 /
MPC556 architecture. The TB has two independent reference registers which can
/
MPC556
3.9.5 Decrementer Register (DEC)
Time base must be enabled to use the decrementer. See
Time Base Control and Status Register
illustrates some of the periods available for the decrementer, assuming a 4-
0
9
99
999
9999
999999
9999999
99999999
999999999
(hex) FFFFFFFF
Count Value
Table 6-4 Decrementer Time-Out Periods
SYSTEM CONFIGURATION AND PROTECTION
Rev. 15 October 2000
1.0 µs
10 µs
100 µs
1.0 ms
10.0 ms
1.0 s
10.0 s
100.0 s
1000. s
4295 s
Time-Out @ 4 MHz
T
dec
NOTE
Table
=
----------------- -
F
tmbclk
for more information.
2
32
6-16) (unless the clock module is
0.2 µs
2.0 µs
20 µs
200 µs
2 ms
200 ms
2.0 s
20 s
200 s
859 s
for more information.
Time-Out @ 20 MHz
6.13.4.4
MOTOROLA
6-13