MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 445

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

QADC64MCR — QADC64 Module Configuration Register
QADC64INT — QADC64 Interrupt Register
13.12.1 QADC64 Module Configuration Register
RESET:
13.12.2 QADC64 Test Register
QADC64TEST — QADC64 Test Register
13.12.3 QADC64 Interrupt Register
MPC555
USER’S MANUAL
RESET:
STOP
Bit(s)
MSB
9:15
MSB
2:7
0
0
0
1
8
0
0
All QADC64 analog channel/port pins that are not used for analog input channels can
be used as digital port pins. Port values are read/written by accessing the port A and
B data registers (PORTQA and PORTQB). Port A pins are specified as inputs or out-
puts by programming the port data direction register (DDRQA). Port B is an input-only
port.
Used for factory test only.
FRZ
/
1
0
1
0
MPC556 QUEUED ANALOG-TO-DIGITAL CONVERTER MODULE-64
Name
STOP
SUPV
FRZ
—
—
IRL1
2
0
2
0
Low-power stop mode enable. When the STOP bit is set, the clock signal to the QADC64 is dis-
abled, effectively turning off the analog circuitry.
0 = Enable QADC64 clock
1 = Disable QADC64 clock
assertion of the IMB3 FREEZE signal.
0 = QADC64 ignores the IMB3 FREEZE signal
1 = QADC64 finishes any current conversion, then freezes
Reserved
sor or unrestricted.
0 = Only the module configuration register, test register, and interrupt register are designated as
1 = All QADC64 registers and tables are designated as supervisor-only data space
Reserved
FREEZE assertion response. The FRZ bit determines whether or not the QADC64 responds to
Supervisor/unrestricted data space. The SUPV bit designates the assignable space as supervi-
3
0
3
0
supervisor-only data space. Access to all other locations is unrestricted
Table 13-7 QADC64MCR Bit Descriptions
RESERVED
4
0
4
0
5
0
5
0
Rev. 15 October 2000
6
0
6
0
7
0
IRL2
7
0
SUPV
8
1
Description
8
0
9
0
9
0
10
0
10
0
11
11
0
0x30 4802, 0x30 4C02
0
RESERVED
RESERVED
12
12
0
0
13
13
0
0
0x30 4C00
0x30 4800
0x30 4C04
0x30 4804
MOTOROLA
14
0
14
0
13-33
LSB
LSB
15
0
15
0