MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 172

KIT EVALUATION FOR MPC555

MPC555CME

Manufacturer Part Number
MPC555CME
Description
KIT EVALUATION FOR MPC555
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheet

Specifications of MPC555CME

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC555
Data Bus Width
32 bit
Interface Type
RS-232
For Use With/related Products
MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
3.15.4.14 Implementation-Specific Data Storage Protection Error Interrupt
MPC555
USER’S MANUAL
Execution resumes at offset 0x01300 from the base address indicated by MSR
The implementation-specific data storage protection error interrupt occurs in the fol-
lowing case:
The following registers are set:
Save/Restore Register 0 (SRR0)
Save/Restore Register 1 (SRR1)
Machine State Register (MSR)
• The access violates the storage protection.
/
MPC556
Register Name
CENTRAL PROCESSING UNIT
11:15
Other
Other
Bits
ME
LE
10
IP
1
2
3
4
Rev. 15 October 2000
Set to the effective address of the instruction that caused the
interrupt
Set to 0
Set to 0
Set to 1 if the fetch access was to a guarded storage when
MSR
Set to 1 if the storage access is not permitted by the protec-
tion mechanism; otherwise set to 0
Set to 0
Set to 0
Loaded from bits 16:31 of MSR. In the current implementa-
tion, Bit 30 of the SRR1 is never cleared, except by loading a
zero value from MSR
No change
No change
Bit is copied from ILE
Set to 0
IR
= 1, otherwise set to 0
RI
Description
MOTOROLA
IP
.
3-50

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