MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 388

KIT EVALUATION FOR MPC555

MPC555CME

Manufacturer Part Number
MPC555CME
Description
KIT EVALUATION FOR MPC555
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheet

Specifications of MPC555CME

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC555
Data Bus Width
32 bit
Interface Type
RS-232
For Use With/related Products
MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
11.3 L2U Block Diagram
11.4 Modes Of Operation
MPC555
USER’S MANUAL
Figure 11-1
The L2U Module can operate in the following modes:
• Supports a default global entry for memory space not covered by other regions:
• Interrupt generated upon:
• The PowerPC MSR[DR] bit (data relocate) controls DMPU protection on/off op-
• Programming is done using PowerPC’s mtspr/mfspr instructions to/from imple-
• No protection for accesses to the SRAM module on the L-bus (SRAM has its own
• Normal Mode
• Reset Operation
• Factory Test Mode
• Peripheral Mode
/
eration
mentation specific special purpose registers.
protection options)
— Default access protection
— Default guarded attribute
— Access violation
— Load from guarded region
— Write to read-only region
MPC556
Address
Decode
shows a block diagram of the L-bus to U-bus interface.
Figure 11-1 L2U Bus Interface Block Diagram
L-BUS TO U-BUS INTERFACE (L2U)
L-bus Interface
U-bus Interface
Rev. 15 October 2000
Reservation
Control
U-bus
L-bus
DMPU
MOTOROLA
11-2

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