MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 53

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

1.2.2 Four-Bank Memory Controller
1.2.3 U-Bus System Interface Unit (USIU)
1.2.4 Flexible Memory Protection Unit
1.2.5 448 Kbytes of CDR MoneT Flash EEPROM Memory (CMF)
1.2.6 26 Kbytes of Static RAM
MPC555
USER’S MANUAL
• Works with SRAM, EPROM, flash EEPROM, and other peripherals
• Byte write enables
• 32-bit address decodes with bit masks
• Memory transfer start (MTS): This pin is the transfer start signal to access a
• Clock synthesizer
• Power management
• Reset controller
• PowerPC decrementer and time base
• Glueless interface to SRAMs and burstable FLASHs
• Real-time clock register
• Periodic interrupt timer
• Hardware bus monitor and software watchdog timer
• Interrupt controller that supports up to eight external and eight internal interrupts
• IEEE 1149.1 JTAG test access port
• External bus interface
• Four instruction regions and four data regions
• 4-Kbyte to 16-Mbyte region size support
• Default attributes available in one global entry
• Attribute support for speculative accesses
• One 256-Kbyte and one 192-Kbyte module
• Page read mode
• Block (32-Kbyte) erasable
• External 4.75-V to 5.25-V program and erase power supply
• One 16-Kbyte and one 10-Kbyte module
• Fast (one-clock) access
• Keep-alive power
• Soft defect detection (SDD)
/
slave’s external memory by an external bus master
— On-chip emulation (OnCE
— 24 address pins, 32 data pins
— Supports multiple master designs
— Four-beat transfer bursts, two-clock minimum bus transactions
— Tolerates 5-V inputs, provides 3.3-V outputs
MPC556
Rev. 15 October 2000
TM
OVERVIEW
) development interface
MOTOROLA
1-3