MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 464

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

14.3 Signal Descriptions
14.4 Memory Map
MPC555
USER’S MANUAL
The QSMCM has 12 external pins, as shown in
in use for their submodule function, can be used as general-purpose I/O port pins. The
RXDx and TXDx pins can alternately serve as general-purpose input-only and output-
only signals, respectively. ECK is a dedicated clock pin.
For detailed descriptions of QSMCM signals, refer to
isters,
The QSMCM memory map, shown in
QSPI and dual SCI control and status registers, and the QSPI RAM. The QSMCM
memory map can be divided into supervisor-only data space and assignable data
space. The address offsets shown are from the base address of the QSMCM module.
Refer to
internal memory map.
IMB3*
/
MPC556
14.7.3 QSPI
1.3 MPC555 / MPC556 Address Map
*Note: SBIU Bus and interface to IMB3 are each 16 bits wide.
Pins, and
QUEUED SERIAL MULTI-CHANNEL MODULE
Figure 14-1 QSMCM Block Diagram
Receive and Transmit Queue
QSPI QUEUE RAM
14.8.6 SCI
Rev. 15 October 2000
QSPI
SBIU
DSCI
SCI1
SCI2
Table
Pins.
14-1, includes the global registers, the
for a diagram of the MPC555 / MPC556
Figure
14.6 QSMCM Pin Control Reg-
14-1. Seven of the pins, if not
2
7
2
SCK/QGPIO6
RXD1/QGPI1
TXD2/QGPO2
PCS[0]/SS/QGPIO0
PCS1/QGPIO1
PCS2/QGPIO2
PCS3/QGPIO3
TXD1/QGPO1
RXD2/QGPI2
MISO/QGPIO4
MOSI/QGPIO5
MOTOROLA
ECK
14-2