MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 442

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

13.11.1 Interrupt Sources
MPC555
USER’S MANUAL
The QADC64 has four interrupt service sources, each of which is separately enabled.
Each time the result is written for the last CCW in a queue, the completion flag for the
corresponding queue is set, and when enabled, an interrupt request is generated. In
the same way, each time the result is written for a CCW with the pause bit set, the
queue pause flag is set, and when enabled, an interrupt request is generated.
Table 13-5
queue 1 and queue 2 activity.
Both polled and interrupt-driven QADC64 operations require that status flags must be
cleared after an event occurs. Flags are cleared by first reading QASR with the appro-
priate flag bits set to one, then writing zeros to the flags that are to be cleared. A flag
can be cleared only if the flag was a logic one at the time the register was read by the
CPU. If a new event occurs between the time that the register is read and the time that
it is written, the associated flag is not cleared.
Queue 1
Queue 2
Queue
/
MPC556 QUEUED ANALOG-TO-DIGITAL CONVERTER MODULE-64
PIE1
CIE1
PIE2
CIE2
CF1
CF2
PF1
PF2
Table 13-5 QADC64 Status Flags and Interrupt Sources
displays the status flag and interrupt enable bits which correspond to
Result written for the last CCW in queue 1
Result written for a CCW with pause bit set in
queue 1
Result written for the last CCW in queue 2
Result written for a CCW with pause bit set in
queue 2
Figure 13-10 QADC64 Interrupt Flow Diagram
CONVERSION COMPLETE INTERRUPT
CONVERSION COMPLETE INTERRUPT
CONVERSION COMPLETE FLAG
CONVERSION COMPLETE FLAG
CONVERSION PAUSE ENABLE
CONVERSION PAUSE ENABLE
CONVERSION PAUSE FLAG
CONVERSION PAUSE FLAG
Queue Activity
Rev. 15 October 2000
ENABLE
ENABLE
QUEUE 1
QUEUE 2
(IRL1)
(IRL2)
Status Flag
CF1
PF1
CF2
PF2
GENERATOR
INTERRUPT
INTERRUPT
CONTROL
Interrupt Enable Bit
CIE1
PIE1
CIE2
PIE2
MOTOROLA
IRQ[7:0]
13-30