MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 30

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Number
4-8
4-9
4-10
4-11
4-12
4-13
4-14
5-1
6-1
6-2
6-3
6-4
6-5
6-6
6-7
6-8
6-9
7-1
7-2
7-3
7-4
7-5
8-1
8-2
8-3
8-4
8-5
8-6
8-7
8-8
8-9
8-10
8-11
8-12
8-13
8-14
MPC555 / MPC555
USER’S MANUAL
Figure
Examples of Instruction Layout in Memory ..................................................... 4-9
Generating Compressed Code Address
Extracting Direct Branch Target Address in the Decompressor ................... 4-11
Code Compression Process (Phase A) ........................................................ 4-12
Bounded Huffman Code Tree ....................................................................... 4-13
Code Decompression Process ..................................................................... 4-14
Exception Table Entries Mapping ................................................................. 4-19
MPC555 / MPC556 USIU Block Diagram ....................................................... 5-2
System Configuration and Protection Logic ................................................... 6-2
MPC555 / MPC556 Memory Map ................................................................... 6-4
SGPIO Cell ..................................................................................................... 6-8
MPC555 / MPC556 Interrupt Structure ........................................................... 6-9
MPC555 / MPC556 Interrupt Configuration .................................................. 6-11
RTC Block Diagram ...................................................................................... 6-14
PIT Block Diagram ........................................................................................ 6-15
SWT Interrupts and Exceptions .................................................................... 6-16
SWT Block Diagram ..................................................................................... 6-17
Reset Configuration Basic Scheme ................................................................ 7-7
Reset Configuration Sampling Scheme
Reset Configuration Timing for
Reset Configuration Timing for
Reset Configuration Sampling Timing Requirements ................................... 7-10
Clock Unit Block Diagram ............................................................................... 8-2
Main System Oscillator (OSCM) ..................................................................... 8-3
System PLL Block Diagram ............................................................................ 8-5
MPC555 / MPC556 Clocks ............................................................................. 8-7
General System Clocks Select ..................................................................... 8-10
Divided System Clocks Timing Diagram ...................................................... 8-11
Clocks Timing For DFNH = 1 (or DFNL = 0) ................................................ 8-12
Clock Source Flow Chart .............................................................................. 8-14
MPC555 / MPC556 Low-Power Modes Flow Diagram ................................. 8-19
Basic Power Supply Configuration ............................................................... 8-22
External Power Supply Scheme ................................................................... 8-23
Keep Alive Register Key State Diagram ....................................................... 8-25
No Standby, No KAPWR, All System Power On/Off .................................... 8-27
Standby and KAPWR, Other Power On/Off ................................................. 8-28
for PowerPC Direct Branches ................................................................... 4-10
For “Short” PORESET Assertion, Limp Mode Disabled .............................. 7-8
“Short” PORESET Assertion, Limp Mode Enabled ..................................... 7-9
“Long” PORESET Assertion, Limp Mode Disabled ..................................... 7-9
Rev. 15 October 2000
LIST OF FIGURES
MOTOROLA
Number
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