MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 598

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

16.4.6 Overload Frames
16.5 Special Operating Modes
16.5.1 Debug Mode
MPC555
USER’S MANUAL
When the TouCAN receives a remote frame, it compares the remote frame ID to the
IDs of all transmit message buffers programmed with a code of 1010. If there is an ex-
act matching ID, the data frame in that message buffer is transmitted. If the RTR bit in
the matching transmit message buffer is set, the TouCAN transmits a remote frame as
a response.
A received remote frame is not stored in a receive message buffer. It is only used to
trigger the automatic transmission of a frame in response. The mask registers are not
used in remote frame ID matching. All ID bits (except RTR) of the incoming received
frame must match for the remote frame to trigger a response transmission.
The TouCAN does not initiate overload frame transmissions unless it detects the fol-
lowing conditions on the CAN bus:
The TouCAN module has three special operating modes:
Debug mode is entered when the FRZ1 bit in CANMCR is set and one of the following
events occurs:
Once entry into debug mode is requested, the TouCAN waits until an intermission or
idle condition exists on the CAN bus, or until the TouCAN enters the error passive or
bus off state. Once one of these conditions exists, the TouCAN waits for the comple-
tion of all internal activity. Once this happens, the following events occur:
• A dominant bit in the first or second bit of intermission
• A dominant bit in the seventh (last) bit of the end-of-frame (EOF) field in receive
• A dominant bit in the eighth (last) bit of the error frame delimiter or overload frame
• Debug mode
• Low-power stop mode
• Auto power save mode
• The HALT bit in the CANMCR is set; or
• The IMB3 FREEZE line is asserted
• The TouCAN stops transmitting or receiving frames
• The prescaler is disabled, thus halting all CAN bus communication
• The TouCAN ignores its Rx pins and drives its Tx pins as recessive
• The TouCAN loses synchronization with the CAN bus and the NOTRDY and
• The CPU is allowed to read and write the error counter registers
/
frames
delimiter
FRZACK bits in CANMCR are set
MPC556
CAN 2.0B CONTROLLER MODULE
Rev. 15 October 2000
MOTOROLA
16-16