MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 250

KIT EVALUATION FOR MPC555

MPC555CME

Manufacturer Part Number
MPC555CME
Description
KIT EVALUATION FOR MPC555
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheet

Specifications of MPC555CME

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC555
Data Bus Width
32 bit
Interface Type
RS-232
For Use With/related Products
MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power On Reset
Hard Reset Sources
External Hard Reset
Loss of Lock
On-Chip Clock Switch
Illegal Low-Power Mode
Software Watchdog
Checkstop
Debug Port Hard Reset
Soft Reset Sources
External Soft Reset
Debug Port Soft Reset
JTAG Reset
7.3 Data Coherency During Reset
MPC555
USER’S MANUAL
HRESET
SRESET
HRESET & SRESET
The MPC555 / MPC556 supports data coherency and avoids data corruption while re-
set. If a cycle is to be executed when detecting any SRESET or HRESET source, then
the cycle will either complete or will not start before generating the corresponding reset
control signal. There are reset sources, however, when the MPC555 / MPC556 gen-
erates an internal reset due to special internal situation where this protection is not
supported. See
In the case of large operand size (32 or 16 bits) transaction to a smaller port size, the
cycle is split into two 16-bit or four 8-bit cycles. In this case, data coherency is assured
and data will not be corrupted.
In the case where the core executes an unaligned load/store cycle which is broken
down into multiple cycles, data coherency is NOT assured between these cycles (i.e.,
data could be corrupted).
A contention on the data pins may occur while asserting external reset (EXT_RESET)
if the data coherency mechanism is required, and thus enables a cycle to complete,
while external hardware drives the data for the configuration word. See
a description of the required EXT_RESET line source in a system.
Reset Source
Table 7-2 Reset Configuration Word and Data Corruption/Coherency
/
MPC556
Reset Driven
Table 7-1 Reset Action Taken For Each Reset Cause
7.4 Reset Status
Logic and
States
Reset
Reset
PLL
Yes
No
No
SRESET
HRESET
HRESET || SRESET
Reset to Use for Data Coherency
Configura-
tion Reset
System
Yes
Yes
Rev. 15 October 2000
No
Register.
(EXT_RESET)
RESET
Module
Clock
Reset
Yes
Yes
No
Pin Driven
HRESET
Yes
Yes
No
Provided only one of them is driven
into the MPC555 / MPC556 at a time
Configura-
Debug
Port
tion
Yes
Yes
Yes
Comments
Internal
Reset
Other
Logic
Yes
Yes
Yes
Table 7-2
MOTOROLA
Pin Driven
SRESET
Yes
Yes
Yes
for
7-4

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