MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 237

KIT EVALUATION FOR MPC555

MPC555CME

Manufacturer Part Number
MPC555CME
Description
KIT EVALUATION FOR MPC555
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheet

Specifications of MPC555CME

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC555
Data Bus Width
32 bit
Interface Type
RS-232
For Use With/related Products
MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
6.13.3.3 Transfer Error Status Register (TESR)
MPC555
USER’S MANUAL
SWSR — Software Service Register
TESR — Transfer Error Status Register
Bit(s)
MSB
MSB
0:15
RESERVED
16
0
0
0
0
0
RESET:
RESET:
RESET:
The transfer error status register contains a bit for each exception source generated
by a transfer error. A bit set to logic 1 indicates what type of transfer error exception
occurred since the last time the bits were cleared by reset or by the normal software
status bit-clearing mechanism. Note that these bits may be set due to canceled spec-
ulative accesses which do not cause an interrupt. The register has two identical sets
of bit fields; one is associated with instruction transfers and the other with data trans-
fers.
17
/
1
0
1
0
0
SWSR
MPC556
Name
IEXT
18
2
0
2
0
0
SWT servicing sequence is written to this register. To prevent SWT time-out, the user should
write a 0x556C followed by 0xAA39 to this register. The SWSR can be written at any time but
returns all zeros when read.
IBMT
19
3
0
3
0
0
SYSTEM CONFIGURATION AND PROTECTION
20
4
0
4
0
0
Table 6-14 SWSR Bit Descriptions
21
5
0
5
0
0
Rev. 15 October 2000
RESERVED
22
6
0
6
0
0
RESERVED
23
7
0
7
0
0
SWSR
24
8
0
8
0
0
Description
25
9
0
9
0
0
DEXT
10
10
26
0
0
0
DBM
11
11
27
0
0
0
12
12
28
0
0
0
RESERVED
13
13
29
0
0
0
0x2F C00E
0x2F C020
MOTOROLA
14
14
30
0
0
0
LSB
LSB
15
15
31
6-29
0
0
0

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