MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 406

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

12.4.1 Interrupt Sources and Levels on IMB
12.4.2 IMB Interrupt Multiplexing
12.4.3 ILBS Sequencing
MPC555
USER’S MANUAL
Byte-enable
The IMB3 has eight interrupt lines. There can be a maximum of 32 levels of interrupts
from the modules on IMB bus. A single module can be a source for more than one in-
terrupt. For example, the QSMCM can generate two interrupts (one for QSCI1/QSCI2
and another for QSPI). In this case, the QSMCM has two interrupt sources. Each of
these two sources can assert the interrupt on any of the 32 levels.
It is possible for multiple interrupt sources to assert the same interrupt level. To reduce
the latency, it is a good practice for each interrupt source to assert an interrupt on a
level on which no other interrupt source is mapped.
The IMB has 10 lines for interrupt support. Eight lines are for interrupts and two for
ILBS. These lines will transfer the 32 interrupt levels to the interrupt synchronizer. A
diagram of the interrupt flow is shown in
Latching 32 interrupt levels using eight IMB interrupt lines is accomplished with a 4:1
time-multiplexing scheme. The UIMB drives two signals (ILBS[0:1]) with a multiplexer
select code that tells all interrupting modules on the IMB about which group of signals
to drive during the next clock.
The IMB interface drives the ILBS signals continuously, incrementing through a code
sequence (00, 01, 10, 11) once every clock The IRQMUX[0:1] bits in the IMB module
configuration register select which type of multiplexing the Interrupt synchronizer will
perform. The IRQMUX field can select time-multiplexing protocols for 8, 16, 24 or 32
interrupt sources. These protocols would take one, two, three or four clocks, respec-
tively.
to IMB
/
MPC556
2
Byte Count
Figure 12-4 Interrupt Synchronizer Signal Flow
Block
U-BUS TO IMB3 BUS INTERFACE (UIMB)
IMB interrupt
Byte-enables
Rev. 15 October 2000
4
8
Figure
(24:31)
(16:23)
UIPEND
(8:15)
(0:7)
12-4.
8
U-bus Data[0:31]
U-bus Interrupt
Level[0:7]
MOTOROLA
12-4