MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 553

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

MMCSMSCRD — MMCSM Status/Control Register (Duplicated)
15.10.1.4 MMCSM Status/Control Register (MMCSMSCR)
MMCSMSCR — MMCSM Status/Control Register
MPC555
USER’S MANUAL
PINC
PINC
MSB
MSB
Bit(s)
8:15
—
—
3:4
5:6
0
0
RESET:
RESET:
0
1
2
7
This register contains both read-only status bits and read/write control bits.
PINL
PINL
—
—
1
1
/
EDGN,
MPC556
EDGP
Name
FREN
PINC
PINL
CLS
CP
—
FREN EDGN EDGP
FREN EDGN EDGP
2
0
2
0
Clock input pin status. This read-only status bit reflects the logic state of the clock input pin
MMCnC (MDA11 or MDA13).
Modulus load input pin status. This read-only status bit reflects the logic state of the modulus
load pin MMCnL (MDA12 or MDA14).
Freeze enable. This active high read/write control bit enables the MMCSM to recognize the
MIOB freeze signal.
Modulus load falling edge/rising edge sensitivity. These active high read/write control bits set
falling-edge and rising edge sensitivity, respectively, for the MMCnL pin (MDA12 or MDA14).
00 = Disabled
01 = MMCSMCNT load on rising edges
10 = MMCSMCNT load on falling edges
11 = MMCSMCNT load on rising and falling edges
Clock select. These read/write control bits select the clock source for the modulus counter.
00 = Disabled
01 = Falling edge of MMCnC (MDA11 or MDA13) pin
10 = Rising edge of MMCnC (MDA11 or MDA13) pin
11 = MMCSM clock prescaler
Clock prescaler. This 8-bit read/write data register stores the two’s complement of the desired
modulus value for loading into the built-in 8-bit clock prescaler. The new value is loaded into the
prescaler counter when the next counter overflow occurs or when the CLS bits are set to select
the clock prescaler as the clock
CP values
3
0
3
0
Table 15-14 MMCSMSCR Bit Descriptions
MODULAR INPUT/OUTPUT SUBSYSTEM (MIOS1)
4
0
4
0
5
0
5
0
CLS
CLS
Rev. 15 October 2000
6
0
6
0
—
—
7
0
7
0
source.Table 15-15
U
U
8
8
Description
U
U
9
9
—
gives the clock divide ratio according to the
10
10
U
U
11
11
U
U
CP
CP
12
12
U
U
13
13
U
U
0x30 60B4
0x30 60B6
0x30 6034
0x30 6036
MOTOROLA
14
14
U
U
15-17
LSB
LSB
15
15
U
U