MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 956

KIT EVALUATION FOR MPC555

MPC555CME

Manufacturer Part Number
MPC555CME
Description
KIT EVALUATION FOR MPC555
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheet

Specifications of MPC555CME

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC555
Data Bus Width
32 bit
Interface Type
RS-232
For Use With/related Products
MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
LE bit 3-22
Least significant bit (LSB) 13-14
Left justified
Length of delay after transfer (DTL) 14-18
Link register 3-18
Little endian mode 3-22
LJSRR 13-49
LJURR 13-49
Load/store unit 3-5, 3-6
Lock
Loop
LOOPQ 14-20
LOOPS 14-46
Low power stop (LPSTOP)
Lowest buffer transmitted first (LBUF) 16-27
Low-power
LR 3-5, 3-18, 17-19
LSB 13-14
LSU 3-5, 3-6
LW0EN 21-51
LW0IA 21-51
LW0IADC 21-51
LW0LA 21-51
LW0LADC 21-51
LW0LD 21-51
LW0LDDC 21-51
LW1EN 21-51
LW1IA 21-51
LW1IADC 21-51
LW1LA 21-51
LW1LADC 21-51
LW1LD 21-51
LW1LDDC 21-51
M 14-46, 14-51
Machine
machine check interrupt, 3-45
Machine status save/restore register 1 3-24
Mask
Master
master
MPC555 / MPC556
USER’S MANUAL
signed result word table (LJSRR) 13-49
unsigned result word table (LJURR) 13-49
/release/busy mechanism 16-15
mode
QADC 13-6
QSM 14-5
stop mode enable (STOP)
check enable 3-21
state register 3-20
status save/restore register 0 3-24
status save/restore register 1 3-24
examples for normal/extended messages 16-8
registers (RX) 16-7
/slave mode select (MSTR) 14-17
external
(LOOPS) 14-46
QADC 13-33
TPU 17-11
–M–
Rev. 15 October 2000
INDEX
MCE 21-54
MCEE 21-55
MCPWM D-22
ME bit 3-21
Message
Mid-analog supply voltage 13-14
MISO 14-33, 14-37
Mode
Mode Fault Flag (MODF) 14-41
Modes
MODF 14-21, 14-26, 14-41
Modulus
MOSI 14-33, 14-37
Most significant bit (MSB) 13-14
MQ1 13-37
MQ2 13-39
MSB 13-14
MSR 3-20, 3-45, 3-47, 3-48, 3-49, 3-50, 3-51, 3-52
MSR, 3-44
MSTR 14-17
Multichannel pulse-width modulation (MCPWM) D-22
Multimaster operation 14-26
Multiphase motor commutation (COMM) D-18
Multiple end-of-queue 13-17
Multiplexed analog inputs 13-5
MUX 13-8, 13-36
New
New input capture/transistion counter (NITC) D-16
NEWQP 14-19, 14-24
NF 14-49, 14-56
NI bit 3-15
NITC D-16
Noise
Non-IEEE 1149.1-1990 operation 22-7
buffer
format error (FORMERR) 16-31
fault flag (MODF) 14-21, 14-26
select (M) 14-46
disabled 13-18
reserved 13-18
scan. See Scan modes
counter 14-51
parameters
parameters D-19
queue pointer value (NEWQP) 14-19
parameters D-17
error flag (NF) 14-49
errors 14-56
flag (NF) 14-56
arbitration phase, 9-30
address map 16-22
code for RX/TX buffers 16-5
deactivation 16-13
structure 16-3
slave channel A
slave edge-aligned mode D-24
non-inverted center aligned mode D-25,
D-41
–N–
MOTOROLA
Index-6

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