MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 960

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

SCCR0 14-45
SCCR1 14-45
SCDR 14-49
SCI 14-33, 14-41
SCI Control Register 0 (SCCR0) 14-44
SCI Control Register 1 (SCCR1) 14-44
SCI Status Register (SCSR) 14-44
SCK 14-11, 14-32, 14-37
S-clock 16-9
SCSR 14-47
SE bit 3-21
SEE 21-54
Send break (SBK) 14-47, 14-53
Sequencer, instruction 3-3
Serial
Serial Clock (SCK) 14-11
Serialization
Service
SGLR 17-19
Simplified mnemonics 3-33
Single-step trace enable 3-21
SIU
SIU signals, 9-4
SIUMCR 6-18
SIW0EN 21-48
SIW1EN 21-48
SIW2EN 21-48
SIW3EN 21-48
MPC555 / MPC556
USER’S MANUAL
baud
idle-line detection 14-57
internal loop 14-58
operation 14-50
parity checking 14-52
pins 14-50
receiver
registers 14-44
SCCR0 14-44
SCCR1 14-44
SCI Baud Rates 14-52
SCI SUBMODULE 14-12
SCSR 14-44
transmitter
actual delay before SCK (equation) 14-35
baud rate (equation) 14-34
clock baud rate (SPBR) 14-17
communication interface (SCI) 14-41
formats 14-51
mode (M) bit 14-51
shifter 14-52
fetch 21-1
request breakpoint flag (SRBK) 17-14
module configuration register 6-18
clock 14-51
rate (SCBR) 14-45
block diagram 14-43
operation 14-56
wakeup 14-58
block diagram 14-42
operation 14-52
equation 14-45
Rev. 15 October 2000
INDEX
Slave Select (SS) 14-41
Slave select signal (SS) 14-37, 14-38
SLW0EN 21-52
SLW1EN 21-52
snooping external bus activity, 3-42
SO bit 3-18
SOF 16-9
Soft reset control field (SOFT_RST) 17-20
SOFT_RST 17-20
SOFTRST 16-11
Software trap enable selection 21-48
SPBR 14-17
SPCR0 14-16
SPCR1 14-18
SPCR2 14-18
SPCR3 14-19
SPE 14-18, 14-41
Special-purpose registers, general 3-25
SPI
SPI Test Scan Path Select (TSBD) 14-8
SPIF 14-21
SPIFIE 14-19
SPRG0–SPRG3 3-25
SPRGs 3-25
SPRs
SPSR 14-19, 14-41
SPWM D-40
SRAM
SRAMMCR 20-3
SRBK 17-14
SRR 16-6
SRR0 3-24, 3-44, 3-45, 3-47, 3-48, 3-49, 3-50, 3-51, 3-52
SRR1 3-24, 3-44, 3-45, 3-47, 3-48, 3-49, 3-50, 3-51, 3-52
SS 14-41
SS 14-37, 14-38
SSE1 13-37
SSE2 13-39
Standard
Start
State machine 13-25, 14-56
Status register (QASR) 13-40
STF 17-11
STOP 13-33, 16-17, 17-11
Stop
finished interrupt enable (SPIFIE) 14-19
TSBD 14-8
general 3-25
data space only 20-3
disabling 20-3
locking 20-3
read only 20-3
registers 20-2
supervisor space only 14-8, 20-3
two-cycle mode 20-3
message format 16-1
bit (beginning of data frame) 14-50
-of-frame (SOF) symbol 16-9
clocks to TCRs (CLKS) 17-13
enable (STOP) bit
frames 16-5
MOTOROLA
Index-10