MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 957

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Non-IEEE floating-point operation 3-15
nonoptional instructions, 3-38
Non-recoverable interrupt 3-26
NOT ACTIVE 16-5
Not ready (NOTRDY) 16-20
NOTRDY 16-16, 16-20
NRI 3-26
OC D-34
OE bit 3-15
OP0, 9-28
OP1, 9-28
OP2, 9-28
OP3, 9-28
operand placement (effects), 3-42
operand representation (illustration), 9-28
optional instructions, 3-38
OR 14-48
Ordered exceptions 3-34
Output compare (OC) D-34
OV (overflow) bit 3-18
Overload frames 16-16
OVERRUN 16-5
Overrun error (OR) 14-48
OX bit 3-14
P 13-47
Parity
Pause (P) 13-15, 13-47
PCBK 17-14
PCS 14-23
PCS0/SS 14-38
PCS3-PCS0/SS 14-41
PE 14-46
Period
Periodic
Periodic interrupt
Peripheral
Peripheral Chip-Select 3-0/Slave Select (PCS3-PC-
PF 14-49, 14-56
PF1 13-41
PF2 13-41
Phase buffer segment 1/2 (PSEG1/2) bit field 16-28
phase-lock loop, 9-7
MPC555 / MPC556
USER’S MANUAL
(PF) flag 14-56
checking 14-52
enable (PE) 14-46
error (PF) bit 14-49
errors 14-56
type (PT) 14-46
type (PT) bit 14-52
to SCK delay (DSCK) 14-23
/pulse-width accumulator (PPWA) D-32
/interval timer 13-29
timer 6-14
chip-selects (PCS) 14-23, 14-36
SO/SS) 14-41
–O–
–P–
Rev. 15 October 2000
INDEX
PIE1 13-37
PIE2 13-39
PIT 6-14
PLL, 9-7
Pointer 14-15
port size device interfaces (illustration), 9-29
port width, 9-1
PORTQA 13-33, 13-34
PORTQB 13-33, 13-34
PORTQS 14-10
PowerPC standards
PowerPC User Instruction Set Architecture
PPWA D-32
PQA 13-8
PQB 13-4, 13-8
PQSPAR 14-9, 14-33, 14-37
PR bit 3-7, 3-21
PRE 21-54
Precise exceptions 3-35
PREE 21-56
Prescaler 13-26
PowerPC Operating Environment Architecture (Book
PowerPC Operating Environment Architecture (Book
PowerPC User Instruction Set Architecture (Book 1)
PowerPC User Instruction Set Architecture (Book 1),
PowerPC Virtual Environment Architecture (Book 2)
PowerPC Virtual Environment Architecture (Book 2),
Book 1
clock
clock high time (PSH) 13-26
control
branch processor, 3-43
fixed-point processor
fixed-point processor, 3-43
interrupts, 3-44
optional facilities and instructions, 3-53
storage control instructions, 3-44
timer facilities, 3-53
branch instructions, 3-39
branch processor, 3-39
computation modes, 3-38
exceptions, 3-39
fixed point-processor, 3-39
instruction classes, 3-38
load/store processor, 3-40
reserved fields, 3-38
operand placement effects, 3-42
storage control instructions, 3-42
timebase, 3-43
instruction fetching, 3-39
(PSCK) 17-11
high time (PSH) 13-36
low time (PSL) 13-36
for TCR1 17-5
for TCR2 17-7
3)
special purpose registers, 3-43
3), 3-43
3-38
3-42
MOTOROLA
Index-7