MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 324

KIT EVALUATION FOR MPC555

MPC555CME

Manufacturer Part Number
MPC555CME
Description
KIT EVALUATION FOR MPC555
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheet

Specifications of MPC555CME

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC555
Data Bus Width
32 bit
Interface Type
RS-232
For Use With/related Products
MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
9.5.5 Alignment and Packaging of Transfers
MPC555
USER’S MANUAL
The MPC555 / MPC556 external bus requires natural address alignment:
The MPC555 / MPC556 performs operand transfers through its 32-bit data port. If the
transfer is controlled by the internal memory controller, the MPC555 / MPC556 can
support 8- and 16-bit data port sizes.
The bus requires that the portion of the data bus used for a transfer to or from a par-
ticular port size be fixed. A 32-bit port must reside on DATA[0:31], a 16-bit port must
reside on DATA[0:15], and an 8-bit port must reside on DATA[0:7]. The MPC555 /
MPC556 always tries to transfer the maximum amount of data on all bus cycles. For a
word operation, it always assumes that the port is 32 bits wide when beginning the bus
cycle.
In
used:
Figure 9-22
Figure
• Byte accesses allow any address alignment
• Half-word accesses require address bit 31 to equal zero
• Word accesses require address bits 30 – 31 to equal zero
• Burst accesses require address bits 30 – 31 to equal zero
• OP0 is the most-significant byte of a word operand and OP3 is the least-signifi-
• The two bytes of a half-word operand are either OP0 (most-significant) and OP1
• The single byte of a byte-length operand is OP0, OP1, OP2, or OP3, depending
/
cant byte.
or OP2 (most-significant) and OP3, depending on the address of the access.
on the address of the access.
0
MPC556
9-21,
OP0
OP0
OP0
illustrates the device connections on the data bus.
Figure
Figure 9-21 Internal Operand Representation
9-22,
OP1
OP1
OP1
EXTERNAL BUS INTERFACE
Table
Rev. 15 October 2000
9-2, and
OP2
OP2
OP2
Table
9-3, the following conventions are
OP3
OP3
OP3
31
Word
Half-word
Byte
MOTOROLA
9-28

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